Design Ideas July 20, 1995

Spare flip-flop stretches WR strobe for DSP

Dhananjay Gadre,
IUCAA Instrumentation Lab, Pune, India

A 74LS592 programmable counter (not available in high-speed F or ACT versions) is a convenient IC to use in DSP applications, such as in an ADSP-2101 design running at 10 MHz. However, a close inspection of the counter's worst-case timing specifications and the WR strobe width reveals that the 74LS592 fails to count the loaded value. An obvious solution to increase the strobe width is to include a wait state. However, using a spare flip-flop solves the problem without resorting to a wait-state insertion.

Fig 1 shows the simple solution. The flip-flop resets on the falling edge of the WR strobe and sets on the next clock-cycle rising edge. The strobe width thus reaches a value of 65 to 80 nsec. The RCK input on the 74LS592 loads the count, and a low-going pulse (40-nsec minimum) on CLOAD en-ables counting. The strobe output of the 74F138 is 39 nsec wide (worst case). Using a spare 74F74 in the system is the trick to increasing the width to 65 to 80 nsec. You should not use this trick to produce a WR strobe to latch data from the data bus. (DI #1732)

PICTURE 1

A spare flip-flop stretches the WR strobe in this high-speed DSP system, thereby eliminating the need to insert a wait state.