Design Ideas: February 1, 1996

A multichannel ADC interface for the ADSP-21xx Series of fixed-point DSP chips uses a MAX186 low-power, eight-channel, serial, 12-bit ADC. This ADC has many features useful for low-power data-collection applications. The device is a complete data-acquisition system with integrated T/H and internal reference. You can use software to configure the analog inputs for unipolar/bipolar and single-ended/differential operation.

The ADC has a simple four-wire interface. Maxim's application handbook shows how to connect the device to a variety of processors but does not show how to connect to the ADSP-21xx DSP family. The method proposed here uses the serial port of the processor, with a pair of inverters, to interconnect the two devices. The use of the serial port of the ADSP-2101 results in compact code with little software overhead.

The MAX186 can operate in either internal- or external-clock mode. In the external-clock mode, the ADC's DIN pin needs to receive a control byte before conversion can occur. Figure 1 shows the format of the control byte, and Figure 2 shows the timing diagram. The SSTRB output of the ADC goes high for one clock cycle after the control byte clocks in. The D_OUT pin gives the result of the conversion on the next 12 SCLK falling edges. In the external-clock mode, the MAX186 requires a clock frequency between 0.1 and 2 MHz.

The ADSP-21xx has a five-wire synchronous serial port. You can program the port to work in a variety of modes, word lengths, and bit rates. The serial clock can be either internal or external; the same is true for the transmit and receive synchronization flags. This application uses a 1.25-MHz internal serial clock. The receive-frame sync (RFS) is external. The SSTRB signal from the MAX186 drives the RFS pin. When the DSP program (Listing 1) configures the serial port, the serial clock starts immediately, and the serial-data output (DT1) pin switches to logic one. This scenario could put the MAX186 out of sync with the ADSP-2101. To avoid this problem, inverter N₁ ( Figure 3) drives the D_IN pin; the default logic level at D_IN is now logic zero.

Conversion begins only when a logic one clocks into the MAX186. To initiate a conversion, the ADSP-2101 transmits a command byte (with a leading logic one). After the command byte clocks in, the MAX186 responds by pulsing its SSTRB strobe pin and then starts transmitting the data on the D_OUT pin. The ADSP-2101 receives this data, with 12-bit occupy positions, D₁₅ to D₄, in the 16-bit DSP register. (DI #1822)