News
Nanoimprint lithography stamps out encouraging results 6/26/2008
Researchers at NIST (National Institute of Standards and Technology) have put NIL (nanoimprint lithography)—a potential next-generation IC-fabrication technology—through its paces and pronounced the technique capable of accurately producing delicate insulating structures on advanced ICs. NIST reports that NIL, which essentially embosses a pattern onto a thin film atop a semiconducto...Spansion, Virident aim to slash power in server farms 6/24/2008
By creating a new category of flash with one-eighth the average operating power and eight-times the bit density of DRAM DIMMs, Spansion hopes to enable a sea change in the way server farm managers implement memory. And by making this new flash device transparent to the rest of the server hardware and software, Virident intends to make the switch-over from DRAM to flash painless and profitable for the managers.Magma opens Beijing and Shanghai offices, launches China university program 6/23/2008
In its latest move to create a bigger presence in China, semiconductor design software supplier Magma Design Automation Inc opened new offices in Beijing and Shanghai, and also started up a university program in China.Atrenta announces 1Team-Genesis, collaborates with STMicroelectronics
6/19/2008
Atrenta Inc announced at the 45th DAC (Design Automation Conference) the availability of 1Team-Genesis, which focuses on the capture of design specifications, the automated generation of design descriptions and documentation, the rapid exploration of design alternatives, and “correct-by-construction” chip assembly.
Low-power environment targets chip design 6/12/2008
Further backing its support for the UPF (Unified Power Format) for exchange of power-related design data between EDA-chip-design tools, Synopsys has assembled a comprehensive array of tools for achieving power-related design objectives.In-Depth
RF: Will it ever be plug-in IP? 6/12/2008
As SOCs for mobile devices integrate radio circuits, they will need to reuse RF IP. But will they be able to?The megapixel race: a chip designer’s point of view 6/12/2008
As CMOS image sensors have migrated from low-end applications to multimegapixel cameras, emphasis has shifted from integrating digital circuits to the fundamental design of the pixel itself.Achieving first-time success at 40 nm 6/12/2008
An early adopter at the 40-nm node tells what it took to get results from this leading-edge process.Integrating high-speed serial I/O: no snap for SOC designers 4/17/2008
Examine the problems an SOC team faces in integrating what many see as an unfamiliar, particularly delicate mixed-signal-IP block into their already-challenging chip designs.Critical clock-domain-crossing bugs 4/2/2008
Awareness of CDC issues, along with the use of good design practices and proven EDA tools for CDC verification, can avoid costly silicon re-spins and significantly improve time to market.Experts
Where is EDA going now? 7/10/2008
Some important changes have been altering the EDA landscape for years, and these changes—in the geographic composition of the chip-design community and in the nature of the chip-design process—are now impossible to conceal.Your chip in half the time? 7/9/2008
GUEST OPINION: A project's commercial success depends on designers' ability to deliver silicon on time. That's why the industry recognizes the growing importance of time to results.Third-party-IP providers: Physical-design questions, part two 6/26/2008
Engineers often overlook one physical-design issue for qualifying IP (intellectual-property) blocks: handling routing blockages and overlayer-routing conditions.Voices: Synopsys’ Aart de Geus on investing to win 6/12/2008
EDA leader discusses 'Frankenstein' flows, multicore trends, and the economy's impact on IC design.Third-party-IP providers: Physical-design questions, part one 5/15/2008
In addition to your architectural and performance goals, six categories of the physical view should be part of the selection criteria for the IP. Part one of this six-part series discusses block pins and grid.DesignIdeas
