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Leading-edge adoption trend, any feeling of déjà vu?

-March 12, 2014

The usual semiconductor industry trend that segments technology node adoption into three categories—leading-edge adopters, followers, and the so-called “trailing edge”—has been disrupted for the 20nm technology node as the 2× reduction in cost per transistor seen from technology node to technology ends after 28nm. This paradigm shift affects both advanced technology node adoption and market strategy for semiconductor companies. The number of companies that are adopting or will adopt 20nm, 16/14nm, 10nm and below for their design starts is going to decrease significantly as the incentive to do so cost-wise is no longer there. A dozen or so companies will keep their leading-edge adoption strategy as their primary differentiator for maintaining their leading market positions, at least as long as the pricing of their chips justifies such leaps forward. Most of the “follower” IC companies are re-adjusting their strategy to differentiate based primarily on architecture and expertise, and will probably stay at the 28nm technology node for a long while.

To understand the impact of such of shift in behavior in the IC design market, we could look at semiconductor manufacturing market trends for the last 10 to 15 years. The semiconductor manufacturing industry has seen a consistent reduction in the number of players at each technology node, such that only a handful of companies are manufacturing at 20nm and below. This steady decrease has also shaped the eco-system accordingly. This trend was triggered by the price of manufacturing at leading-edge technology nodes, and led to the rise of the successful fabless-foundry business model. This trend also had an impact on the EDA providers that serve this market. With only a handful of potential customers, an increasing complexity in addressing manufacturing challenges, and the shift in engagement intensity needed to serve such companies (increasing customization and service engagements in addition to software sales), only a few EDA providers can successfully supply the leading-edge manufacturing companies.

Looking at IC design market history, we can identify some trends that are similar to the ones we’ve seen in semiconductor manufacturing. IC companies are outsourcing more and more of their design implementation by leveraging off-the-shell third party IPs, as well as working with design houses that deliver libraries and IPs customized to their requests. In addition, for their digital designs, they’re focusing primarily on differentiation based on higher-level architecture. The EDA eco-system for IC design implementation is similarly impacted, as addressing leading-edge design challenges for a decreasing number of potential customers is driving consolidation in providers while increasing the support effort needed for each software sales.

Even though the future of advanced technology node adoption is unclear (is there a realistic viability beyond 10nm?), the IC design market is already adapting to this new reality, and is looking at alternative approaches to stay competitive. For instance, instead of looking at cost per transistor, semiconductor companies are considering cost per function. One of the obvious enablers of this approach is 2.5/3D integration. Even though that integration is still not a reality for logic on logic applications, and has suffered some setbacks due to high interposer pricing, it remains one of the most realistic options available in the “more than Moore” technology area. Also, looking at the “trailing edge” companies, we can see that the complexity of designs implemented in the established technology node is also drastically increasing, providing a clear differentiation for these companies. As with any change in a given market, these changes in the IC market will have their victims, especially in the fast-evolving mobile market, where today’s winners may easily be tomorrow’s failures, and where differentiation through leading-edge adoption is not a long-term strategy.

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