Learn how gate array technology compares with FPGAs and custom ASICs across a number of design requirements. What are the limitations of various implementation technologies from a power and performance perspective? Find out the critical factors if you're considering an 8-, 16-or 32-bit embedded controller core. Why is larger not necessarily better when it comes to choosing embedded controller cores? Register here.

Leakage mitigation techniques such as power gating, state retention and dynamic threshold scaling have been shown to significantly reduce standby power consumption. A technical study of state retention schemes, power gating topologies and in-rush current management approaches will be presented, supported by data from a number of leakage optimized implementations and results from test silicon. Register here.

The Synopsys DesignWare® IP for SATA AHCI Host, supports the latest 2.6 SATA specification and is developed to meet the needs of existing and future designs for high performance and low power applications. Learn how a single host IP core can be configured to support multiple SATA devices while maintaining high performance across all devices. Register here.

Comprehensive power management, circuit protection and media solutions for a wide range of portable applications.

This brochure provides comprehensive on-board power and thermal management solutions for a full range of computing platforms.

This intermediate level tutorial provides a review of the basic topologies of Switched Mode Power Supplies (SMPS), addresses voltage mode and current mode control and provides characteristics of topologies for higher power applications.

Introduction to Switch Mode Power supplies. This tutorial provides an overview of the various circuits and their characteristics. The training also describes popular solutions for voltage mode control and current mode control and the tradeoffs in efficiency etc. between the various solutions.

By using a continuous conduction mode (CCM) flyback topology, which has a constant power output characteristic, this power supply is capable of supplying short term, high surge currents of over 7 A for powering industrial equipment such as motors, solenoids or other inductive loads.

Due to today's ever increasing data rates, phase noise and jitter specifications are now critical aspects of modern phase-locked loop design. This tutorial outlines a procedure for efficiently extracting key phase noise and jitter measurements for phase-locked loops using many of the unique simulation capabilities of HSPICE RF. Register today.

For years designers around the world have trusted HSPICE for their signal integrity simulation needs. This tutorial walks through the setup, simulation and analysis of a Synopsys DDR2 memory interface highlighting HSPICE's signal integrity analysis features. Register today.